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10 Sep 1998 The manner in which the processor executes an instruction and advances its program counters is as follows: execute the instruction at PC. copy nPC to PC. add 4 or the branch offset to nPC.
MIPS Reference Sheet. Branch Instructions. Instruction. Operation beq $s, $t, label if ($s == $t) pc += i << 2 bgtz $s, label if ($s > 0) pc += i << 2 blez $s, label if ($s <= 0) pc += i << 2 bne $s, $t, label if ($s != $t) pc += i << 2. Arithmetic and Logical Instructions. Jump Instructions. Instruction. Operation add $d, $s, $t. $d = $s + $t.
Data types: Instructions are all 32 bits; byte(8 bits), halfword (2 bytes), word (4 bytes); a character requires 1 byte of storage; an integer requires 1 word (4 bytes) of storage. Literals: numbers entered as is. e.g. 4; characters enclosed in single quotes. e.g. 'b'; strings enclosed in double quotes. e.g. "A string"
Instructions and their formats. General notes: a. Rs, Rt, and Rd specify general purpose registers b. Square brackets ([]) indicate “the contents of” c. [PC] specifies the address of the instruction in execution d. I specifies part of instruction and its subscripts indicate bit positions of sub-fields e. || indicates concatenation of bit
MIPS hardware and the pseudoinstructions provided by the MIPS assembler. The two types of instructions are easily distinguished. Actual instructions depict the fields in their binary representation. For example, in. Addition (with overflow) the add instruction consists of six fields. Each field's size in bits is the small num-.
MIPS Instruction formats. R-type format. 6. 5 5 5. 5. 6 src src dst. Used by add, sub etc. I-type format. 6. 5 5. 16 base dst offset. Used by lw (load word), sw (store word) etc. There is one more format: the J-type format. Each MIPS instruction must belong to one of these formats. opcode rs rt rd shift amt function opcode rs rt.
R instructions are used when all the data values used by the instruction are located in registers. All R-type instructions have the following format: OP rd, rs, rt. Where "OP" is the mnemonic for the particular instruction. rs, and rt are the source registers, and rd is the destination register. As an example, the add mnemonic can
MIPS Instructions. • Instruction. Meaning add $s1,$s2,$s3. $s1 = $s2 + $s3 sub $s1,$s2,$s3. $s1 = $s2 – $s3 addi $s1,$s2,4. $s1 = $s2 + 4 ori $s1,$s2,4. $s2 = $s2 | 4 lw $s1,100($s2). $s1 = Memory[$s2+100] sw $s1,100($s2). Memory[$s2+100] = $s1 bne $s4,$s5,Label Next instr. is at Label if $s4 ? $s5 beq $s4,$s5,Label
Let's explain each of the fields of the R-type instruction. opcode (B31-26). Opcode is short for "operation code". The opcode is a binary encoding for the instruction. Opcodes are seen in all ISAs. In MIPS, there is an opcode for add. The opcode in MIPS ISA is only 6 bits. Ordinarily, this means there are only 64 possible
Instruction, Opcode/Function, Syntax, Operation. add, 100000, f $d, $s, $t, $d = $s + $t. addu, 100001, f $d, $s, $t, $d = $s + $t. addi, 001000, f $d, $s, i, $d = $s + SE(i). addiu, 001001, f $d, $s, i, $d = $s + SE(i). and, 100100, f $d, $s, $t, $d = $s & $t. andi, 001100, f $d, $s, i, $t = $s & ZE(i). div, 011010, f $s, $t, lo = $s / $t;
     

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